GenAI Chip Hackathon

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Link to GenAI Chip Hackathon GitHub website: https://github.com/ICLAD-Hackathon/ICLAD-Hackathon-2025

Event Overview

The ICLAD-DAC 2025 Hackathon is a competitive research, and educational event where participants will use language models to solve specified chip design problems across the RTL to GDSII flow (e.g. RTL debugging and physical design). The hackathon aims to evaluate how effectively language models can assist in real-world chip design challenges by assigning tasks of varying difficulty for completion.

One track called the open challenge will compete on solving the problems with GenAI models including large language models (LLM) on the cloud, and the other track called the SLM challenge will compete on solving the problems with GenAI small language models (SLM) running on low-cost platforms such as laptops. Separate winners will be selected in each track.

Event Details

This will be a one-day event co-located with DAC on the Sunday of DAC, on June 22nd, 2025. Participants must register for the hackathon using the link at the bottom of this page. Participants must also register for DAC or “I LUV DAC” to get access to the ICLAD hackathon venue.

Infrastructure and resources

   a. SLM Challenge: each team will be provided a Qualcomm X-Elite AI laptop with pre-loaded open SLMs and EDA tools for hardware tasks. Prior to DAC, participants will be offered a tutorial on use of SLMs and EDA tools on the Qualcomm laptop. Participants can also train and use any other SLMs on their laptop.

    b. Open Challenge: participants will also have access to LLMs from cloud service providers, from their personal laptops, or the Qualcomm provided laptops. 

Problem Categories

Choose from four problem categories:

1. GenAI for Spec2Tapeout (ASU)
   Build an agent that generates RTL and GDS from design specs—automated start-to-finish flow.
2.  GenAI for Design Verification (Google)
   Given buggy RTL and specs, create testbenches to catch sneaky logic bugs .
3.  Miscellaneous CVDP Problems (NVIDIA)
   Different tasks that include RTL debugging, testbench integration, design edits, and EDA workflow setup.
4. GenAI for Logic Synthesis (Qualcomm, NXP)
   Repair broken gate-level netlists with smart ECO detection using the correct RTL as a reference.

Each category has multiple problems with varying levels of difficulty. Solve as many problems as you can across multiple categories. Winners will be named per category and per track.

Infrastructure and Resources

SLM Track

• Each team gets a Qualcomm X-Elite AI laptop with pre-installed open SLMs and EDA tools.
• A tutorial session will be held before DAC on how to use these tools .
• Teams may also use their own trained SLMs if desired.

Documentation for using these laptops will be available soon.

Open Challenge Track

• Access Gemini APIs and Google Cloud compute resources .
• Teams have received GCP credentials via email .
• Docs provided for:
  1. Setting up Google Cloud instances
  2.  Pulling docker images per problem (preloaded with tools + data)
  3. Querying Gemini APIs from inside docker or directly via GCP Documentation for this is (here)[https://github.com/ICLAD-Hackathon/ICLAD-Hackathon-2025/blob/main/GCP-infrastructure-setup.md]

Evaluation

Solutions will be judged based on criteria and metrics specific to each problem category. Check the problem descriptions for detailed guidelines. 

Prizes

• Awards given per problem category, with separate winners in SLM and Open Challenge tracks .
• Open to all participants—but prizes are reserved for student teams only.
• One winner per category per track will be recognized and celebrated! 

Let the chips fall where they may… and may the best GenAI model win! 

Event Registration (Registration is free, but all participants must register)
DAC Language Model Hackathon Event Registration