Time: June 28-29, 2024
Location: IBM Research
Almaden, San Jose, CA

This new international workshop will focus on how to use LLM (Large Language Model) as a methodology to help design circuits, software, and computing systems with improved quality, productivity, robustness, and cost. It is the first of its kind international workshop in the community that will focus on discussing results that leverage the significant advancement and innovation captured by the generative AI and LLM technology to offer new methods and solutions for design automation targeting various applications. The workshop will be a timely venue that will host leading researchers and thought leaders in this fast-growing area and will provide a forum for researchers and practitioners to present their latest results, contribute open-source LLM models, datasets, tool flows, and offer benchmarking, testing and validation methods and solutions. LAD'24 is in-cooperation with ACM SIGDA.
Large Language Model (LLM) for Standard Cell Layout Design Optimization
Authors: Chia-Tung Ho, Haoxing Ren
MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation
Authors: Yongan Zhang, Zhongzhi Yu, Yonggan Fu, Cheng Wan, Yingyan Celine Lin
AMSNet: Netlist Dataset for AMS Circuits Authors: Zhuofu Tao, Yichen Shi, Yiru Huo, Rui Ye, Zonghang Li, Li Huang, Chen Wu, Na Bai, Zhiping Yu, Ting-Jung Lin, Lei He

General Chair

General Chair

Technical Program Committee Chair

Technical Program Committee Chair

Finance Chair

Special/Invited Sessions Chair

Open Community Chair

Industrial Liaison

Local Arrangements Chair

Publicity Chair

Industry Outreach Chair

Publications Chair

Webmaster


Full paper submission: April 8th, 2024, Anywhere on Earth (AoE) (final deadline)
Notification of acceptance: May 10th, 2024
Camera ready paper due: May 26th, 2024
Call for Papers (Link)

IBM

University of Illinois Urbana Champaign

Stanford University

Nvidia

New York University

Synopsys

Cadence

Ansys

University of California Berkeley

University of Texas Austin

Siemens EDA











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